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Title: A Dynamic Analog Concurrently-Processed Adaptive Neural Network Chip
Subject: Computer Science & Engineering Grade level: High School - Grades 10-12 Academic Level: Advanced Project Type: Building Type Cost: Medium Awards: 1st place, Canada Wide Virtual Science Fair (VSF) Calgary Youth Science Fair (March 2006) Gold Medal Affiliation: Canada Wide Virtual Science Fair (VSF) Year: 2006 Description: The purpose of this project is to overcome the limitations of current neural network chips which generally have poor reconfigurability, and lack parameters for efficient learning. A new general-purpose analog neural network design is made for the TSMC 0.35um CMOS process. Parallel processing is possible with a massive array of independent cells, concurrently processing data. This allows the network to quickly recognize information in various applications. With support for multiple learning algorithms, arbitrary routing, high density, and storage of many parameters using improved high-resolution analog multi-valued memory, this network is suitable for vast improvements to the learning algorithms. Such improvements allow learning to interact with routing for a network which is not bound to a fixed layout. Link: http://www.virtualsciencefair.org/2006/stag6m2/ |
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For More Information: Artificial Neural Networks |
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